Optimistic Trace-driven Simulation
نویسنده
چکیده
Parallel simulation of multiprocessor architectures is a promising direction because a parallel system provides the high computation and storage capabilities that are required by detailed architectural simulation. Additionally, the behavior of the target system exhibits natural parallelism. In this paper, we consider the evaluation of the memory hierarchy of multiprocessor systems via parallel trace-driven simulation. We present a Time Warp-like parallel trace-driven simulation algorithm and data structures. The overhead components of the optimistic algorithm as well as a number of optimization strategies are discussed. The performance of the optimistic parallel simulator as implemented on a KSR-2 is reported. Our results show that signi cant speedup can be achieved for applications which have good data locality. As the amount of shared references misses increases, the frequent communication and synchronization overhead inherent in the applications limits also the speedup of the parallel trace-driven simulation. This work was supported by the National Science Foundation under Grants CCR-91-23308 and CCR 94-01689
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